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rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a ad713 one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 features enhanced replacement for lf347 and tl084 ac performance 1 m s settling to 0.01% for 10 v step 20 v/ m s slew rate 0.0003% total harmonic distortion (thd) 4 mhz unity gain bandwidth dc performance 0.5 mv max offset voltage (ad713k) 20 m v/ c max drift (ad713k) 200 v/mv min open loop gain (ad713k) 2 m v p-p typ noise, 0.1 hz to 10 hz true 14-bit accuracy single version: ad711, dual version: ad712 available in 16-pin soic, 14-pin plastic dip and hermetic cerdip packages and in chip form mil-std-883b processing available standard military drawing available applications active filters quad output buffers for 12- and 14-bit dacs input buffers for precision adcs photo diode preamplifier applications quad precision, low cost, high speed, bifet op amp product description the ad713 is a quad operational amplifier, consisting of four ad711 bifet op amps. these precision monolithic op amps offer excellent dc characteristics plus rapid settling times, high slew rates, and ample bandwidths. in addition, the ad713 pro- vides the close matching ac and dc characteristics inherent to amplifiers sharing the same monolithic die. the single-pole response of the ad713 provides fast settling: l m s to 0.01%. this feature, combined with its high dc precision, makes it suitable for use as a buffer amplifier for 12- or 14-bit dacs and adcs. it is also an excellent choice for use in active filters in 12-, 14- and 16-bit data acquisition systems. further- more, the ad713s low total harmonic distortion (thd) level of 0.0003% and very close matching ac characteristics make it an ideal amplifier for many demanding audio applications. the ad713 is internally compensated for stable operation at unity gain and is available in seven performance grades. the ad713j and ad713k are rated over the commercial tempera- ture range of 0 c to +70 c. the ad713a and ad713b are rated over the industrial temperature of C40 c to +85 c. the ad713s and ad713t are rated over the military temperature range of C55 c to +125 c and are available processed to mil-std-883b, rev. c. connection diagrams plastic (n) and cerdip (q) packages soic (r) package output output 1 2 3 4 5 6 7 8 14 13 12 11 10 9 ?n +in output ?n +in +v s output ?n +in +in ?n output ? s output ad713 (top view) 1 4 2 3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 output ?n ?n +in +in +in ?n nc nc = no connect nc output ?n +in +v s ? s 1 4 2 3 ad713 (top view) the ad713 is offered in a 16-pin soic, 14-pin plastic dip and hermetic cerdip package, or in chip form. product highlights 1. the ad713 is a high speed bifet op amp that offers excel- lent performance at competitive prices. it upgrades the per- formance of circuits using op amps such as the tl074/ tl084, lt1058, lf347 and opa404. 2. slew rate is 100% tested for a guaranteed minimum of 16 v/ m s (j, a and s grades). 3. the combination of analog devices advanced processing technology, laser wafer drift trimming and well-matched ion-implanted jfets provides outstanding dc precision. in- put offset voltage, input bias current and input offset current are specified in the warmed-up condition and are 100% tested. 4. very close matching of ac characteristics between the four amplifiers makes the ad713 ideal for high quality active filter applications.
ad713Cspecifications (v s = 6 15 v @ t a = +25 8 c unless otherwise noted) ad713j/a/s ad713k/b/t parameter conditions min typ max min typ max units input offset voltage 1 initial offset 0.3 1.5 0.2 0.5 mv offset t min to t max 0.5 2/2/ 2 0.4 0.7 / 0.7 / 1.0 mv vs. temp 5 5 20/ 20 / 15 m v/ c vs. supply 78 95 84 100 db vs. supply t min to t max 76/76/ 76 95 84 100 db long-term stability 15 15 m v/month input bias current 2 v cm = 0 v 40 150 40 75 pa v cm = 0 v @ t max 3.4/9.6/154 1.7/4.8/77 na v cm = 10 v 55 200 55 120 pa input offset current v cm = 0 v 10 75 10 35 pa v cm = 0 v @ t max 1.7/4.8/77 0.8/2.2/36 na matching characteristics input offset voltage 0.5 1.8 0.4 0.8 mv input offset voltage t min to t max 0.7 2.3/2.3/ 2.3 0.6 1.0 / 1.0 / 1.3 mv input offset voltage drift 8 6 25 m v/ c input bias current 10 100 10 35 pa crosstalk f = 1 khz C130 C130 db f = 100 khz C95 C95 db frequency response small signal bandwidth unity gain 3.0 4.0 3.4 4.0 mhz full power response v o = 20 v p-p 200 200 khz slew rate unity gain 16 20 18 20 v/ m s settling time to 0.01% 1.0 1.2 1.0 1.2 m s total harmonic distortion f = 1 khz; r l 3 2 k w ; 0.0003 0.0003 % v o = 3 v rms input impedance differential 3 10 12 i 5.5 3 10 12 i 5.5 w i pf common mode 3 10 12 i 5.5 3 10 12 i 5.5 w i pf input voltage range differential 3 20 20 v common-mode voltage 4 +14.5, C11.5 +14.5, C11.5 v t min to t max C11 +13 C11 +13 v common mode v cm = 10 v 78 88 84 94 db rejection ratio t min to t max 76/76/ 76 84 82 90 db v cm = 11 v 72 84 78 90 db t min to t max 70/70/ 70 80 74 84 db input voltage noise 0.1 hz to 10 hz 2 2 m v p-p f = 10 hz 45 45 nv/ ? hz f = 100 hz 22 22 nv/ ? hz f = 1 khz 18 18 nv/ ? hz f = 10 khz 16 16 nv/ ? hz input current noise f = 1 khz 0.01 0.01 pa/ ? hz open-loop gain v o = 10 v; r l 3 2 k w 150 400 200 400 v/mv t min to t max 100/100/ 100 100 v/mv output characteristics voltage r l 3 2 k w +13, C12.5 +13.9, C13.3 +13, C12.5 +13.9, C13.3 v t min to t max 12/ 12/ 6 12 +13.8, C13.1 6 12 +13.8, C13.1 v current short circuit 25 25 ma power supply rated performance 15 15 v operating range 6 4.5 6 18 6 4.5 6 18 v quiescent current 10.0 13.5 10.0 12.0 ma transistor count # of transistors 120 120 notes 1 input offset voltage specifications are guaranteed after 5 minutes of operation at t a = +25 c. 2 bias current specifications are guaranteed maximum at either input after 5 minutes of operation at t a = +25 c. for higher temperatures, the current doubles every 10 c. 3 defined as voltage between inputs, such that neither exceeds 10 v from ground. 4 typically exceeding C14.1 v negative common-mode voltage on either input results in an output phase reversal. specifications subject to change without notice. rev. b C2C
ad713 rev. b C3C ordering guide temperature package package model range description option* ad713aq C40 c to +85 c 14-pin ceramic dip q-14 ad713bq C40 c to +85 c 14-pin ceramic dip q-14 ad713jchips 0 c to +70 c bare die ad713jn 0 c to +70 c 14-pin plastic dip n-14 ad713jr-16 0 c to +70 c 16-pin plastic soic r-16 ad713jr-16-reel 0 c to +70 c 16-pin plastic soic r-16 ad713jr-16-reel7 0 c to +70 c 16-pin plastic soic r-16 ad713kn 0 c to +70 c 14-pin plastic dip n-14 ad713schips C55 c to +125 c bare die ad713sq C55 c to +125 c 14-pin ceramic dip q-14 ad713sq/883b C55 c to +125 c 14-pin ceramic dip q-14 AD713TQ C55 c to +125 c 14-pin ceramic dip q-14 AD713TQ/883b C55 c to +125 c 14-pin ceramic dip q-14 5962-9063301mca C55 c to +125 c 14-pin ceramic dip q-14 5962-9063302mca C55 c to +125 c 14-pin ceramic dip q-14 *n = plastic dip; q = cerdip; r = small outline ic (soic). absolute maximum ratings 1, 2 supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v internal power dissipation 2 input voltage 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v output short circuit duration (for one amplifier) . . . . . . . . . . . . . . . . . . . . . . . . indefinite differential input voltage . . . . . . . . . . . . . . . . . . +v s and Cv s storage temperature range (q) . . . . . . . . . . C65 c to +150 c storage temperature range (n, r) . . . . . . . . C65 c to +125 c operating temperature range ad713j/k . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 c to +70 c ad713a/b . . . . . . . . . . . . . . . . . . . . . . . . . . C40 c to +85 c ad713s/t . . . . . . . . . . . . . . . . . . . . . . . . . C55 c to +125 c lead temperature range (soldering 60 sec) . . . . . . . . +300 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 thermal characteristics: 14-pin plastic package: q jc = 30 c/watt; q ja = 100 c/watt 14-pin cerdip package: q jc = 30 c/watt; q ja = 110 c/watt 16-pin soic package: q jc = 30 c/watt; q ja = 100 c/watt 3 for supply voltages less than 18 v, the absolute maximum input voltage is equal to the supply voltage. metalization photograph dimensions shown in inches and (mm). contact factory for latest dimensions.
ad713 rev. b C4C Ctypical characteristics figure 1. input voltage swing vs. supply voltage figure 4. quiescent current vs. supply voltage figure 7. input bias current vs. common mode voltage figure 3. output voltage swing vs. load resistance figure 6. output impedance vs. frequency, g = 1 figure 9. gain bandwidth product vs. temperature figure 2. output voltage swing vs. supply voltage figure 5. input bias current vs. temperature figure 8. short circuit current limit vs. temperature
ad713 rev. b C5C figure 12. power supply rejection vs. frequency figure 15. output swing and error vs. settling time figure 18. slew rate vs. input error signal figure 11. open-loop gain vs. supply voltage figure 14. large signal frequency response figure 17. input noise voltage spectral density figure 10. open-loop gain and phase margin vs. frequency figure 13. common mode rejec- tion vs. frequency figure 16. total harmonic distor- tion vs. frequency
ad713 rev. b C6C figure 19. crosstalk test circuit figure 20. crosstalk vs. frequency figure 21b. unity gain follower pulse response (large signal) figure 21a. unity gain follower figure 22a. unity gain inverter figure 21c. unity gain follower pulse response (small signal) figure 22c. unity gain inverter pulse response (small signal) figure 22b. unity gain inverter pulse response (large signal)
ad713 rev. b C7C the error signal is thus clamped twice: once to prevent over- loading amplifier a2 and then a second time to avoid overload- ing the oscilloscope preamp. a tektronix oscilloscope preamp type 7a26 was carefully chosen because it recovers from the ap- proximately 0.4 volt overload quickly enough to allow accurate measurement of the ad713s 1 m s settling time. amplifier a2 is a very high speed fet input op amp; it provides a voltage gain of 10, amplifying the error signal output of the ad713 under test (providing an overall gain of 5). figure 25. settling characteristics to C10 v step. upper trace: output of ad713 under test (5 v/div). lower trace: amplified error voltage (0.01%/ div) power supply bypassing the power supply connections to the ad713 must maintain a low impedance to ground over a bandwidth of 4 mhz or more. this is especially important when driving a significant resistive or capacitive load, since all current delivered to the load comes from the power supplies. multiple high quality bypass capacitors are recommended for each power supply line in any critical ap- plication. a 0.1 m f ceramic and a 1 m f electrolytic capacitor as shown in figure 26 placed as close as possible to the amplifier (with short lead lengths to power supply common) will assure adequate high frequency bypassing in most applications. a minimum bypass capacitance of 0.1 m f should be used for any application. figure 26. recommended power supply bypassing measuring ad713 settling time the photos of figures 24 and 25 show the dynamic response of the ad713 while operating in the settling time test circuit of figure 23. the input of the settling time fixture is driven by a flat-top pulse generator. the error signal output from the false summing node of a1, the ad713 under test, is clamped, ampli- fied by op amp a2 and then clamped again. figure 23. settling time test circuit figure 24. settling characteristics 0 v to +10 v step. upper trace: output of ad713 under test (5 v/div). lower trace: amplified error voltage (0.01%/div)
ad713 rev. b C8C a high speed instrumentation amplifier circuit the instrumentation amplifier circuit shown in figure 27 can provide a range of gains from unity up to 1000 and higher using only a single ad713. the circuit bandwidth is 1.2 mhz at a gain of 1 and 250 khz at a gain of 10; settling time for the entire circuit is less than 5 m s to within 0.01% for a 10 volt step, (g = 10). other uses for amplifier a4 include an active data guard and an active sense input. figure 27. a high speed instrumentation amplifier circuit table i provides a performance summary for this circuit. the photo of figure 28 shows the pulse response of this circuit for a gain of 10. table i. performance summary for the high speed instrumentation amplifier circuit gain r g bandwidth t settle (0.01%) 1 nc 1.2 mhz 2 m s 2 20 k w 1.0 mhz 2 m s 10 4.04 k w 0.25 mhz 5 m s figure 28. the pulse response of the high speed instrumentation amplifier. gain = 10 a high speed four op amp cascaded amplifier circuit figure 29 shows how the four amplifiers of the ad713 may be connected in cascade to form a high gain, high bandwidth am- plifier. this gain of 100 amplifier has a C3 db bandwidth greater than 600 khz. figure 29. a high speed four op amp cascaded amplifier circuit figure 30. thd test circuit high speed op amp applications and techniques dac buffers (i-to-v converters) the wide input dynamic range of jfet amplifiers makes them ideal for use in both waveform reconstruction and digital-audio dac applications. the ad713, in conjunction with the ad1860 dac, can achieve 0.0016% thd (here at a 4fs or a 176.4 khz update rate) without requiring the use of a deglitcher. just such a circuit is shown in figure 31. the 470 pf feedback capacitor used with ic2a, along with op amp ic2b and its associated components, together form a 3-pole low-pass filter. each or all of these poles can be tailored for the desired attenuation and phase characteristics required for a particular application. in this application, one half of an ad713 serves each channel in a two- channel stereo system.
ad713 rev. b C9C figure 31. a d/a converter circuit for digital audio figure 32. harmonic distortion as frequency for the digital audio circuit of figure 31 driving the analog input of an a/d converter an op amp driving the analog input of an a/d converter, such as that shown in figure 33, must be capable of maintaining a constant output voltage under dynamically changing load condi- tions. in successive approximation converters, the input current is compared to a series of switched trial currents. the compari- son point is diode clamped but may vary by several hundred millivolts, resulting in high frequency modulation of the a/d in- put current. the output impedance of a feedback amplifier is made artificially low by its loop gain. at high frequencies, where the loop gain is low, the amplifier output impedance can ap- proach its open loop value. figure 33. the ad713 as an adc buffer most ic amplifiers exhibit a minimum open loop output impedance of 25 w , due to current limiting resistors. a few hundred microamps reflected from the change in converter loading can introduce errors in instantaneous input voltage. if the a/d conversion speed is not excessive and the band- width of the amplifier is sufficient, the amplifiers output will return to the nominal value before the converter makes its comparison. however, many amplifiers have relatively narrow bandwidths, yielding slow recovery from output transients. the ad713 is ideally suited as a driver for a/d converters since it offers both a wide bandwidth and a high open loop gain.
ad713 rev. b C10C figure 34. buffer recovery time source current = 2 ma figure 35. buffer recovery time sink current = 1 ma driving a large capacitive load the circuit of figure 36 employs a 100 w isolation resistor which enables the amplifier to drive capacitive loads exceeding 1500 pf; the resistor effectively isolates the high frequency feedback from the load and stabilizes the circuit. low frequency feedback is returned to the amplifier summing junction via the low pass filter formed by the 100 w series resistor and the load capacitance, c1. figure 37 shows a typical transient response for this connection. figure 36. circuit for driving a large capacitance load table ii. recommended trim resistor values vs. grades for ad7545 for v d = +5 v trim jn/aq/ kn/bq/ ln/cq/ gln/gcq/ resistor sd td ud gud r1 500 w 200 w 100 w 20 w r2 150 w 68 w 33 w 6.8 w figure 37. transient response, r l = 2 k w , c l = 500 pf cmos dac applications the ad713 is an excellent output amplifier for cmos dacs. it can be used to perform both 2 and 4 quadrant operation. the output impedance of a dac using an inverted r-2r ladder ap- proaches r for codes containing many 1s, 3r for codes con- taining a single 1 and infinity for codes containing all zeros. for example, the output resistance of the ad7545 will modu- late between 11 k w and 33 k w . therefore, with the dacs in- ternal feedback resistance of 11 k w , the noise gain will vary from 2 to 4/3. this changing noise gain modulates the effect of the input offset voltage of the amplifier, resulting in nonlinear dac amplifier performance. the ad713, with its guaranteed 1.5 mv input offset voltage, minimizes this effect achieving 12-bit performance. figures 38 and 39 show the ad713 and a 12-bit cmos dac, the ad7545, configured for either a unipolar binary (2-quad- rant multiplication) or bipolar (4-quadrant multiplication) op- eration. capacitor c1 provides phase compensation which reduces overshoot and ringing. figure 38. unipolar binary operation figure 39. bipolar operation
ad713 rev. b C11C figure 40. a programmable state variable filter circuit filter applications a programmable state variable filter for the state variable or universal filter configuration of figure 40 to function properly, dacs a1 and b1 need to control the gain and q of the filter characteristic, while dacs a2 and b2 must accurately track for the simple expression of f c to be true. this is readily accomplished using two ad7528 dacs and one ad713 quad op amp. capacitor c3 compensates for the effects of op amp gain-bandwidth limitations. this filter provides low pass, high pass and band pass outputs and is ideally suited for applications where microprocessor con- trol of filter parameters is required. the programmable range for component values shown is f c = 0 to 15 khz and q = 0.3 to 4.5. gic and fdnr filter applications the closely matched and uniform ac characteristics of the ad713 make it ideal for use in gic (gyrator) and fdnr (fre- quency dependent negative resistor) filter applications. figures 41 and 43 show the ad713 used in two typical active filters. the first shows a single ad713 simulating two coupled induc- tors configured as a one-third octave bandpass filter. a single section of this filter meets ansi class ii specifications and handles a 7.07 v rms signal with <0.002% thd (20 hzC20 khz). figure 43 shows a 7-pole antialiasing filter for a 2 3 oversam- pling (88.2 khz) digital audio application. this filter has <0.05 db pass band ripple and 19.8 0.3 m s delay, dc-20 khz and will handle a 5 v rms signal (v s = 15 v) with no overload at any internal nodes. the filter of figure 41 can be scaled for any center frequency by using the formula: f c = 1.1 1 2 p rc where all resistors and capacitors scale equally. resistors r3Cr8 should not be greater than 2 k w in value, to prevent parasitic os- cillations caused by the amplifiers input capacitance. figure 41. a 1/3 octave filter circuit
ad713 rev. b C12C c1206aC5C11/90 printed in u.s.a. if this is not practical, small lead capacitances (10C20 pf) should be added across r5 and r6. figures 42 and 44 show the output amplitude vs. frequency of these filters. figure 42. output amplitude vs. frequency of 1/3 octave filter 14-pin cerdip (q-14) package 14-pin plastic (n-14a) dip package 16-pin soic (r-16) package pin 1 0.2992 (7.60) 0.2914 (7.40) 0.4193 (10.65) 0.3937 (10.00) 1 16 9 8 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.1043 (2.65) 0.0926 (2.35) 0.4133 (10.50) 0.3977 (10.00) 0.0118 (0.30) 0.0040 (0.10) 0.0125 (0.32) 0 0091 (0 23) 0.0500 (1.27) 0.0157 (0.40) 8 0 0.0291 (0.74) 0.0098 (0.25) x 45 outline dimensions dimensions shown in inches and (mm). figure 43. an antialiasing filter figure 44. relative output amplitude vs. frequency of antialiasing filter

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